Single Event Upset tests and failure rate estimation for a front-end ASIC adopted in high-flux-particle therapy applications

A 64 channels Application Specific Integrated Circuit, named TERA09, designed in a 0.35 um technology for particle therapy applications, has been characterized for Single Event Upset probability. TERA09 is a current-to-frequency converter that offers a wide input range, extending from few nA to hundreds of uA, with linearity deviations in the order of a few percent. This device operates as front-end readout electronics for parallel plate ionization chambers adopted in clinical applications. This chip is going to be located beside the monitor chamber, thus not directly exposed to the particle beam. For this reason, no radiation hardening techniques were adopted during the microelectronics design. The intent of the test reported in this paper is to predict the TERA09 upset rate probability in a real application scenario. Due to the fact that TERA09 has an extended digital area with registers and counters, it is interesting to estimate the effect of the secondary neutron field produced during the treatment. The radiation damage test took place at the SIRAD facility of the Italian National Institute for Nuclear Physics in Padova, Italy. The SIRAD facility allows to study the CMOS upset rate as a function of the energy deposited during irradiation. By irradiating the chip with ions of different Linear Energy Transfer, it is possible to calculate the single event effect cross-section as a function of the deposited energy. It resulted that the minimum deposited energy in a CMOS silicon sensitive volume of , responsible for a Single Event Upset probability higher than zero, is 690 keV. In the last part of the paper, we calculated the expected upset probability in a typical clinical environment, knowing the fluence of secondary, backward-emitted neutrons. Considering as an example a treatment room located at the CNAO particle therapy center in Pavia, the expected upset rate for TERA09 is events/year. Using a redundant and independent monitor chamber, the upset probability expected during one detector readout is lower than 10^-24, as explained in the document.